The methods and structures disclosed herein are related to high aspect ratio trenches for use, for example, in trench isolation regions of semiconductor devices (e.g., for bipolar semiconductor devices, such as bipolar junction transistors (BJTs) or heterojunction bipolar transistors (HBTs)) and, particularly, to a method of forming a high aspect ratio trench, to a method of forming a bipolar semiconductor device having a high aspect ratio trench isolation region and to the resulting bipolar semiconductor device structure.
Those skilled in the art will recognize that it is desirable in bipolar semiconductor devices, such as bipolar junction transistors (BJTs) and, particularly, in high performance heterojunction bipolar transistors (HBTs), to have a relatively high transit frequency fT and maximum oscillation frequency fmax. fmax is a function of fT as well as various parasitic capacitances and resistances including, but are not limited to, parasitic collector-to-base capacitance Ccb and parasitic collector resistance Rc. Reduction of the parasitic capacitances and resistances can result in a higher fmax. Thus, it would be advantageous to provide an improved bipolar semiconductor device, such as a bipolar junction transistor (BJT) or heterojunction bipolar transistor (HBT), in which collector-to-base capacitance Ccb and collector resistance Rc are both minimized as well as a method of forming such an improved bipolar semiconductor device.